1. Field of the Invention
This invention relates generally to a superconducting digital circuit, and more particularly, to a superconducting digital circuit that employs coupled Josephson superconducting transmission lines to provide active timing arbitration of data and clock signals.
2. Discussion of the Related Art
As is well understood in the art, superconducting single flux quantum (SFQ) digital circuits operate through the transmission and processing of very short duration, very small voltage pulses. See, for example, K. K. Likharev, V. K. Semenov; xe2x80x9cRSFQ Log/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systemxe2x80x9d; IEEE Transactions on Applied Superconductivity, Vol. 1, No. 1, March 1991. These pulses are used to carry information to and between logic gates that are used to make up a larger digital circuit. These pulses carry both timing information, as when they used to transmit a clock signal, as well as data to be processed by some portion of the circuit. Digital circuits that employ superconductor devices, and in particular those based on transmission of single flux quanta, are often desirable because they can be operated at clock speeds exceeding 100 GHz.
Josephson junction transmission lines are typically employed in superconductor digital circuits to transmit narrow pulse width signals at low power. Josephson junction transmission lines employ Josephson junctions at predetermined intervals along the transmission line that regenerate and transmit pulse signals as single flux quanta (SFQ). A Josephson junction is a tunneling device that includes two opposing superconductive films, for example, Nb films, that are separated by an insulating dielectric layer. If a sufficient current bias is applied to each junction, then a voltage pulse applied across any junction will cause that junction to switch in such a way that it generates a voltage pulse, or regenerates the voltage pulse which caused it to switch. The time integral of the voltage pulse generated by junction switching in this way is determined by fundamental physical constants and is h/2e, where h is Plank""s constant (6.6262xc3x9710xe2x88x9234 Joule seconds), and e is the fundamental electrical charge (1.602xc3x9710xe2x88x9219 Coulombs). The regenerated voltage pulse causes the next neighboring junction in the Josephson transmission line to switch in turn. In this way a voltage pulse can propagate along a Josephson transmission line. These pulses are referred to as single flux quanta pulses or SFQ pulses. A typical SFQ pulse is 2-3 ps in duration and 1 mV in amplitude.
FIG. 1 is a schematic view of a superconducting Josephson junction transmission line 10 that is representative of the known transmission lines of this type, and can be a clock transmission line or a data transmission line. The transmission line 10 propagates signal pulses as quantized magnetic flux, represented here as an SFQ pulse 12. The transmission line 10 includes a series of Josephson junction circuits 14, spaced at predetermined intervals along the transmission line 10, that act to regenerate the SFQ pulse 12 at each stage. The Josephson junction circuits 14 are connected in parallel between a reference ground and a power source 16. The power source 16 applies a current to the Josephson junction circuits 14. Each Josephson junction circuit 14 is represented as an ideal Josephson junction 18 in parallel with a shunting resistor 20 and an inductor 22. Inductors 26 are connected in series between each Josephson junction circuit to allow propagation of the SFQ pulse 12 from one junction to the next.
Each time the added energy from the SFQ pulse 12 arrives at a Josephson junction circuit 14, the Josephson junction 18 switches, generating a voltage pulse that develops an SFQ pulse. That SFQ pulse then energizes the next Josephson junction 18, which also generates an SFQ pulse 12. Therefore, a pulse is recreated and propagates down the transmission line 10 in this manner as a particular clock or data pulse in the overall digital circuit. The spacing between the junction circuits 14 is application specific for a particular pulse width and power requirement.
Certain factors, such as thermal noise, Johnson noise in the various resistors, and component fabrication variations, affect how fast each junction 18 will generate the voltage pulse, and recreate the SFQ pulse sent to the next junction circuit 14. These effects provide an uncertainty as to when a clock or data pulse will reach a particular digital component in the circuit. This uncertainty in timing increases relative to the number of Josephson junctions in the particular transmission line as the square root of the number of junctions.
When operated at very high clock frequencies, timing between clock pulses and data pulses is critical, For example, in a digital circuit is operated at a 100 GHz clock, any given data pulse must arrive at its destination logic gate within a time interval of less than ten picoseconds in order to be correctly processed by that gate. Because of their high frequency, clock and data pulses arriving at any particular circuit element must be closely synchronized or errors will occur. The timing uncertainty of the SFQ pulses discussed above increases the need for greater timing synchronization. Therefore, superconductor circuits typically operate well below their potential speed so that the pulse timing uncertainty is less important.
Various techniques are known in the art for synchronizing data and clock pulses in superconductor digital circuits. For example, known superconductor digital circuits employ re-synchronizing elements and techniques that act to hold or store data pulses until they are re-synchronized to the clock signal. However, these procedures typically add complexity to the design of a particular circuit and are invasive and disruptive of the data signals, and reduce circuit speed.
What is needed is a superconductor digital circuit that employs active timing arbitration between clock and data pulses without suffering from the drawbacks discussed above. It is therefore an object of the present invention to provide active timing arbitration in a superconductive circuit.
The present invention solves the aforementioned problems by providing a superconductor digital logic circuit that reduces the relative timing uncertainty between signals propagating along two Josephson transmission lines by allowing active timing arbitration. The superconductor digital logic circuit includes a first superconducting transmission line having at least one inductor and at least one Josephson junction for transmitting a stream of first input SFQ pulses, and a second superconducting transmission line having at least one inductor and at least one Josephson junction for transmitting a stream of second input SFQ pulses that are correlated to the first input pulses. The first and second superconducting transmission lines are coupled together to provide a flux attraction and/or repulsion between the first and second input pulses for reducing relative timing uncertainty.
Additional objects, advantages, and features of the present invention will become apparent from the following description and appended claims, taken conjunction with the accompanying drawings.